The present application relates to neural network architecture, and particularly, to a memory cell including an array of stack capacitors for neural networks.
Neural networks have wide applicability in various technical fields including automatic recognition systems, such as character recognition systems, voice recognition systems, etc., activation control systems for robots and neuro computer systems incorporating artificial intelligence.
Current-based nonvolatile memory (NVM) devices represent states with different resistance values, and are attractive for neural network acceleration. Current-based memory devices in a crossbar configuration can implement vector-matrix multiplication in neural network computations. By mapping input vector to input voltages and weight matrix to resistive crossbar array, vector matrix multiplication can be calculated in a single step by sampling the current flowing in each column. This approach can be several orders of magnitude more efficient than CMOS ASIC approaches in terms of both speed and power.
Capacitors have been used as a storage element to store analog information in neutral network. Although charge stored on the capacitors can leak, several schemes have been developed to overcome that problem. For example, a periodic refresh scheme can be employed. Another approach is to guarantee that each neural network learning cycle is shorter than a certain time period, where the capacitor leakage is not significant enough to impact overall neural network training and convergence. Therefore, developing a compact memory unit cell structure with a capacitor as the analog information storage element remains needed for neural network applications.